More verbose trace

This commit is contained in:
Seth Morabito 2022-08-25 16:35:22 -07:00
parent 9f945b0b4f
commit dc4facf240
1 changed files with 8 additions and 1 deletions

View File

@ -1982,7 +1982,14 @@ impl Cpu {
match self.dispatch(bus) {
Ok(i) => {
// We should have the necessary information to trace after dispatch.
trace!(bus, self.steps, &format!("[{:08x}] {}", &self.r[R_PC], &self.ir));
trace!(
bus,
self.steps,
&format!(
"[PC={:08x} PSW={:08x} R0={:08x} R1={:08x}] {}",
&self.r[R_PC], &self.r[R_PSW], &self.r[0], &self.r[1], &self.ir
)
);
self.r[R_PC] = (self.r[R_PC] as i32 + i) as u32
}
Err(CpuError::Bus(BusError::NoDevice(_)))