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dmd_core
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This commit is contained in:
Seth Morabito 2018-11-22 18:53:50 -08:00
parent b0816ec2c1
commit dfac1579a6
8 changed files with 6488 additions and 8457 deletions
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40
src/bus.rs
View File

@ -1,7 +1,7 @@
use err::BusError;
use std::fmt::Debug;
use mem::Mem;
use std::fmt::Debug;
/// Access Status Code
pub enum AccessCode {
@ -45,7 +45,10 @@ pub struct AddressRange {
impl AddressRange {
pub fn new(start_address: usize, len: usize) -> AddressRange {
AddressRange { start_address, len }
AddressRange {
start_address,
len,
}
}
pub fn contains(&self, address: usize) -> bool {
address >= self.start_address && address < self.start_address + self.len
@ -99,54 +102,43 @@ impl Bus {
pub fn read_op_half(&mut self, address: usize) -> Result<u16, BusError> {
let m = self.get_device(address)?;
Ok((m.read_byte(address, AccessCode::OperandFetch)? as u16) |
(m.read_byte(address + 1, AccessCode::OperandFetch)? as u16).wrapping_shl(8))
Ok((m.read_byte(address, AccessCode::OperandFetch)? as u16)
| (m.read_byte(address + 1, AccessCode::OperandFetch)? as u16).wrapping_shl(8))
}
pub fn read_op_word(&mut self, address: usize) -> Result<u32, BusError> {
let m = self.get_device(address)?;
Ok((m.read_byte(address, AccessCode::OperandFetch)? as u32) |
(m.read_byte(address + 1, AccessCode::OperandFetch)? as u32).wrapping_shl(8) |
(m.read_byte(address + 2, AccessCode::OperandFetch)? as u32).wrapping_shl(16) |
(m.read_byte(address + 3, AccessCode::OperandFetch)? as u32).wrapping_shl(24))
Ok((m.read_byte(address, AccessCode::OperandFetch)? as u32)
| (m.read_byte(address + 1, AccessCode::OperandFetch)? as u32).wrapping_shl(8)
| (m.read_byte(address + 2, AccessCode::OperandFetch)? as u32).wrapping_shl(16)
| (m.read_byte(address + 3, AccessCode::OperandFetch)? as u32).wrapping_shl(24))
}
pub fn read_half_unaligned(
&mut self,
address: usize,
access: AccessCode,
) -> Result<u16, BusError> {
pub fn read_half_unaligned(&mut self, address: usize, access: AccessCode) -> Result<u16, BusError> {
self.get_device(address)?.read_half(address, access)
}
pub fn read_word_unaligned(
&mut self,
address: usize,
access: AccessCode,
) -> Result<u32, BusError> {
pub fn read_word_unaligned(&mut self, address: usize, access: AccessCode) -> Result<u32, BusError> {
self.get_device(address)?.read_word(address, access)
}
pub fn write_byte(&mut self, address: usize, val: u8) -> Result<(), BusError> {
self.get_device(address)?
.write_byte(address, val, AccessCode::Write)
self.get_device(address)?.write_byte(address, val, AccessCode::Write)
}
pub fn write_half(&mut self, address: usize, val: u16) -> Result<(), BusError> {
if address & 1 != 0 {
return Err(BusError::Alignment);
}
self.get_device(address)?
.write_half(address, val, AccessCode::Write)
self.get_device(address)?.write_half(address, val, AccessCode::Write)
}
pub fn write_word(&mut self, address: usize, val: u32) -> Result<(), BusError> {
if address & 3 != 0 {
return Err(BusError::Alignment);
}
self.get_device(address)?
.write_word(address, val, AccessCode::Write)
self.get_device(address)?.write_word(address, val, AccessCode::Write)
}
pub fn load(&mut self, address: usize, data: &[u8]) -> Result<(), BusError> {

78
src/cpu.rs
View File

@ -184,42 +184,31 @@ fn add_offset(val: u32, offset: u32) -> u32 {
((val as i32).wrapping_add(offset as i32)) as u32
}
const SHIFT_8_TABLE: [u8; 65] = [
0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfc, 0xfe, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff,
0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfc, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff,
];
const SHIFT_16_TABLE: [u16; 65] = [
0x0000, 0x8000, 0xc000, 0xe000, 0xf000, 0xf800, 0xfc00, 0xfe00, 0xff00,
0xff80, 0xffc0, 0xffe0, 0xfff0, 0xfff8, 0xfffc, 0xfffe, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff,
0x0000, 0x8000, 0xc000, 0xe000, 0xf000, 0xf800, 0xfc00, 0xfe00, 0xff00, 0xff80, 0xffc0, 0xffe0, 0xfff0, 0xfff8, 0xfffc, 0xfffe,
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
0xffff,
];
const SHIFT_32_TABLE: [u32; 65] = [
0x00000000, 0x80000000, 0xc0000000, 0xe0000000, 0xf0000000, 0xf8000000,
0xfc000000, 0xfe000000, 0xff000000, 0xff800000, 0xffc00000, 0xffe00000,
0xfff00000, 0xfff80000, 0xfffc0000, 0xfffe0000, 0xffff0000, 0xffff8000,
0xffffc000, 0xffffe000, 0xfffff000, 0xfffff800, 0xfffffc00, 0xfffffe00,
0xffffff00, 0xffffff80, 0xffffffc0, 0xffffffe0, 0xfffffff0, 0xfffffff8,
0xfffffffc, 0xfffffffe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
0x00000000, 0x80000000, 0xc0000000, 0xe0000000, 0xf0000000, 0xf8000000, 0xfc000000, 0xfe000000, 0xff000000, 0xff800000,
0xffc00000, 0xffe00000, 0xfff00000, 0xfff80000, 0xfffc0000, 0xfffe0000, 0xffff0000, 0xffff8000, 0xffffc000, 0xffffe000,
0xfffff000, 0xfffff800, 0xfffffc00, 0xfffffe00, 0xffffff00, 0xffffff80, 0xffffffc0, 0xffffffe0, 0xfffffff0, 0xfffffff8,
0xfffffffc, 0xfffffffe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
];
lazy_static! {
static ref MNEMONICS: HashMap<u16, Mnemonic> = {
let mut m = HashMap::new();
@ -426,7 +415,7 @@ impl Cpu {
pub fn new() -> Cpu {
Cpu {
r: [0; 16],
error_context: ErrorContext::None
error_context: ErrorContext::None,
}
}
@ -971,25 +960,22 @@ impl Cpu {
self.r[R_PC] += 2;
// Set old PSW ISC, TM, and ET to 0, 0, 1
self.r[R_PSW] &= !(F_ISC|F_TM|F_ET);
self.r[R_PSW] &= !(F_ISC | F_TM | F_ET);
self.r[R_PSW] |= 1 << O_ET;
self.context_switch_1(bus, a)?;
self.context_switch_2(bus, a)?;
self.r[R_PSW] &= !(F_ISC|F_TM|F_ET);
self.r[R_PSW] &= !(F_ISC | F_TM | F_ET);
self.r[R_PSW] |= 7 << O_ISC;
self.r[R_PSW] |= 3 << O_ET;
self.context_switch_3(bus)?;
self.error_context = ErrorContext::None;
},
_ => {
return Err(CpuError::Exception(CpuException::PrivilegedOpcode))
}
_ => return Err(CpuError::Exception(CpuException::PrivilegedOpcode)),
}
}
CLRW | CLRH | CLRB => {
self.write_op(bus, &instr.operands[0], 0)?;
@ -1164,7 +1150,7 @@ impl Cpu {
// TODO: Enable MMU, if present
self.r[R_PC] = self.r[0];
pc_increment = 0;
},
}
_ => {
return Err(CpuError::Exception(CpuException::PrivilegedOpcode));
}
@ -1176,7 +1162,7 @@ impl Cpu {
// TODO: Disable MMU, if present
self.r[R_PC] = self.r[0];
pc_increment = 0;
},
}
_ => {
return Err(CpuError::Exception(CpuException::PrivilegedOpcode));
}
@ -1282,17 +1268,17 @@ impl Cpu {
if (a & 0x80000000) != 0 {
result |= SHIFT_32_TABLE[b as usize + 1];
}
},
}
Data::Half | Data::UHalf => {
if (a & 0x8000) != 0 {
result |= SHIFT_16_TABLE[b as usize + 1] as u32;
}
},
}
Data::Byte | Data::SByte => {
if (a & 0x80) != 0 {
result |= SHIFT_8_TABLE[b as usize + 1] as u32;
}
},
}
_ => {}
};
@ -1315,9 +1301,7 @@ impl Cpu {
self.set_c_flag(false);
self.set_v_flag_op(result, dst);
}
GATE => {
println!("[GATE] Unimplemented.")
}
GATE => println!("[GATE] Unimplemented."),
MCOMW | MCOMH | MCOMB => {
let dst = &instr.operands[1];
let a = self.read_op(bus, &instr.operands[0])?;
@ -1551,8 +1535,8 @@ impl Cpu {
}
_ => {
println!("Unhandled op: {:?}", instr);
return Err(CpuError::Exception(CpuException::IllegalOpcode))
},
return Err(CpuError::Exception(CpuException::IllegalOpcode));
}
};
Ok(pc_increment)
@ -1565,7 +1549,9 @@ impl Cpu {
Ok(i) => self.r[R_PC] = (self.r[R_PC] as i32 + i) as u32,
Err(CpuError::Bus(BusError::Alignment)) => {}
Err(CpuError::Bus(BusError::Permission)) => {}
Err(CpuError::Bus(BusError::NoDevice(_))) | Err(CpuError::Bus(BusError::Read(_))) | Err(CpuError::Bus(BusError::Write(_))) => {}
Err(CpuError::Bus(BusError::NoDevice(_)))
| Err(CpuError::Bus(BusError::Read(_)))
| Err(CpuError::Bus(BusError::Write(_))) => {}
Err(CpuError::Exception(CpuException::IllegalOpcode)) => {}
Err(CpuError::Exception(CpuException::InvalidDescriptor)) => {}
Err(CpuError::Exception(CpuException::PrivilegedOpcode)) => {}
@ -1576,7 +1562,7 @@ impl Cpu {
pub fn step_with_error(&mut self, bus: &mut Bus) -> Result<(), CpuError> {
match self.dispatch(bus) {
Ok(i) => self.r[R_PC] = (self.r[R_PC] as i32 + i) as u32,
Err(e) => return Err(e)
Err(e) => return Err(e),
}
Ok(())
@ -1953,7 +1939,7 @@ impl Cpu {
1 => CpuLevel::Executive,
2 => CpuLevel::Supervisor,
3 => CpuLevel::Kernel,
_ => CpuLevel::User
_ => CpuLevel::User,
}
}

11
src/dmd.rs
View File

@ -1,9 +1,9 @@
use bus::Bus;
use cpu::Cpu;
use rom_lo::LO_ROM;
use rom_hi::HI_ROM;
use err::BusError;
use err::CpuError;
use rom_hi::HI_ROM;
use rom_lo::LO_ROM;
#[derive(Debug)]
pub struct Dmd {
@ -15,7 +15,10 @@ impl Dmd {
pub fn new() -> Dmd {
let cpu = Cpu::new();
let bus = Bus::new(0x100000);
let dmd = Dmd { cpu, bus };
let dmd = Dmd {
cpu,
bus,
};
dmd
}
@ -45,4 +48,4 @@ mod tests {
let mut dmd = Dmd::new();
dmd.reset().unwrap();
}
}
}

364
src/instr.rs
View File

@ -2,190 +2,190 @@
// Single-byte instructions
//
pub const HALT :u16 = 0x00;
pub const SPOPRD :u16 = 0x02;
pub const SPOPD2 :u16 = 0x03;
pub const MOVAW :u16 = 0x04;
pub const SPOPRT :u16 = 0x06;
pub const SPOPT2 :u16 = 0x07;
pub const RET :u16 = 0x08;
pub const MOVTRW :u16 = 0x0C;
pub const SAVE :u16 = 0x10;
pub const SPOPWD :u16 = 0x13;
pub const EXTOP :u16 = 0x14;
pub const SPOPWT :u16 = 0x17;
pub const RESTORE :u16 = 0x18;
pub const SWAPWI :u16 = 0x1C;
pub const SWAPHI :u16 = 0x1E;
pub const SWAPBI :u16 = 0x1F;
pub const POPW :u16 = 0x20;
pub const SPOPRS :u16 = 0x22;
pub const SPOPS2 :u16 = 0x23;
pub const JMP :u16 = 0x24;
pub const CFLUSH :u16 = 0x27;
pub const TSTW :u16 = 0x28;
pub const TSTH :u16 = 0x2A;
pub const TSTB :u16 = 0x2B;
pub const CALL :u16 = 0x2C;
pub const BPT :u16 = 0x2E;
pub const WAIT :u16 = 0x2F;
pub const EMB :u16 = 0x30;
pub const SPOP :u16 = 0x32;
pub const SPOPWS :u16 = 0x33;
pub const JSB :u16 = 0x34;
pub const BSBH :u16 = 0x36;
pub const BSBB :u16 = 0x37;
pub const BITW :u16 = 0x38;
pub const BITH :u16 = 0x3A;
pub const BITB :u16 = 0x3B;
pub const CMPW :u16 = 0x3C;
pub const CMPH :u16 = 0x3E;
pub const CMPB :u16 = 0x3F;
pub const RGEQ :u16 = 0x40;
pub const BGEH :u16 = 0x42;
pub const BGEB :u16 = 0x43;
pub const RGTR :u16 = 0x44;
pub const BGH :u16 = 0x46;
pub const BGB :u16 = 0x47;
pub const RLSS :u16 = 0x48;
pub const BLH :u16 = 0x4A;
pub const BLB :u16 = 0x4B;
pub const RLEQ :u16 = 0x4C;
pub const BLEH :u16 = 0x4E;
pub const BLEB :u16 = 0x4F;
pub const RGEQU :u16 = 0x50;
pub const BGEUH :u16 = 0x52;
pub const BGEUB :u16 = 0x53;
pub const RGTRU :u16 = 0x54;
pub const BGUH :u16 = 0x56;
pub const BGUB :u16 = 0x57;
pub const BLSSU :u16 = 0x58;
pub const BLUH :u16 = 0x5A;
pub const BLUB :u16 = 0x5B;
pub const RLEQU :u16 = 0x5C;
pub const BLEUH :u16 = 0x5E;
pub const BLEUB :u16 = 0x5F;
pub const RVC :u16 = 0x60;
pub const BVCH :u16 = 0x62;
pub const BVCB :u16 = 0x63;
pub const RNEQU :u16 = 0x64;
pub const BNEH_D :u16 = 0x66;
pub const BNEB_D :u16 = 0x67;
pub const RVS :u16 = 0x68;
pub const BVSH :u16 = 0x6A;
pub const BVSB :u16 = 0x6B;
pub const REQLU :u16 = 0x6C;
pub const BEH_D :u16 = 0x6E;
pub const BEB_D :u16 = 0x6F;
pub const NOP :u16 = 0x70;
pub const NOP3 :u16 = 0x72;
pub const NOP2 :u16 = 0x73;
pub const BNEQ :u16 = 0x74;
pub const RNEQ :u16 = 0x74;
pub const BNEH :u16 = 0x76;
pub const BNEB :u16 = 0x77;
pub const RSB :u16 = 0x78;
pub const BRH :u16 = 0x7A;
pub const BRB :u16 = 0x7B;
pub const REQL :u16 = 0x7C;
pub const BEH :u16 = 0x7E;
pub const BEB :u16 = 0x7F;
pub const CLRW :u16 = 0x80;
pub const CLRH :u16 = 0x82;
pub const CLRB :u16 = 0x83;
pub const MOVW :u16 = 0x84;
pub const MOVH :u16 = 0x86;
pub const MOVB :u16 = 0x87;
pub const MCOMW :u16 = 0x88;
pub const MCOMH :u16 = 0x8A;
pub const MCOMB :u16 = 0x8B;
pub const MNEGW :u16 = 0x8C;
pub const MNEGH :u16 = 0x8E;
pub const MNEGB :u16 = 0x8F;
pub const INCW :u16 = 0x90;
pub const INCH :u16 = 0x92;
pub const INCB :u16 = 0x93;
pub const DECW :u16 = 0x94;
pub const DECH :u16 = 0x96;
pub const DECB :u16 = 0x97;
pub const ADDW2 :u16 = 0x9C;
pub const ADDH2 :u16 = 0x9E;
pub const ADDB2 :u16 = 0x9F;
pub const PUSHW :u16 = 0xA0;
pub const MODW2 :u16 = 0xA4;
pub const MODH2 :u16 = 0xA6;
pub const MODB2 :u16 = 0xA7;
pub const MULW2 :u16 = 0xA8;
pub const MULH2 :u16 = 0xAA;
pub const MULB2 :u16 = 0xAB;
pub const DIVW2 :u16 = 0xAC;
pub const DIVH2 :u16 = 0xAE;
pub const DIVB2 :u16 = 0xAF;
pub const ORW2 :u16 = 0xB0;
pub const ORH2 :u16 = 0xB2;
pub const ORB2 :u16 = 0xB3;
pub const XORW2 :u16 = 0xB4;
pub const XORH2 :u16 = 0xB6;
pub const XORB2 :u16 = 0xB7;
pub const ANDW2 :u16 = 0xB8;
pub const ANDH2 :u16 = 0xBA;
pub const ANDB2 :u16 = 0xBB;
pub const SUBW2 :u16 = 0xBC;
pub const SUBH2 :u16 = 0xBE;
pub const SUBB2 :u16 = 0xBF;
pub const ALSW3 :u16 = 0xC0;
pub const ARSW3 :u16 = 0xC4;
pub const ARSH3 :u16 = 0xC6;
pub const ARSB3 :u16 = 0xC7;
pub const INSFW :u16 = 0xC8;
pub const INSFH :u16 = 0xCA;
pub const INSFB :u16 = 0xCB;
pub const EXTFW :u16 = 0xCC;
pub const EXTFH :u16 = 0xCE;
pub const EXTFB :u16 = 0xCF;
pub const LLSW3 :u16 = 0xD0;
pub const LLSH3 :u16 = 0xD2;
pub const LLSB3 :u16 = 0xD3;
pub const LRSW3 :u16 = 0xD4;
pub const ROTW :u16 = 0xD8;
pub const ADDW3 :u16 = 0xDC;
pub const ADDH3 :u16 = 0xDE;
pub const ADDB3 :u16 = 0xDF;
pub const PUSHAW :u16 = 0xE0;
pub const MODW3 :u16 = 0xE4;
pub const MODH3 :u16 = 0xE6;
pub const MODB3 :u16 = 0xE7;
pub const MULW3 :u16 = 0xE8;
pub const MULH3 :u16 = 0xEA;
pub const MULB3 :u16 = 0xEB;
pub const DIVW3 :u16 = 0xEC;
pub const DIVH3 :u16 = 0xEE;
pub const DIVB3 :u16 = 0xEF;
pub const ORW3 :u16 = 0xF0;
pub const ORH3 :u16 = 0xF2;
pub const ORB3 :u16 = 0xF3;
pub const XORW3 :u16 = 0xF4;
pub const XORH3 :u16 = 0xF6;
pub const XORB3 :u16 = 0xF7;
pub const ANDW3 :u16 = 0xF8;
pub const ANDH3 :u16 = 0xFA;
pub const ANDB3 :u16 = 0xFB;
pub const SUBW3 :u16 = 0xFC;
pub const SUBH3 :u16 = 0xFE;
pub const SUBB3 :u16 = 0xFF;
pub const HALT: u16 = 0x00;
pub const SPOPRD: u16 = 0x02;
pub const SPOPD2: u16 = 0x03;
pub const MOVAW: u16 = 0x04;
pub const SPOPRT: u16 = 0x06;
pub const SPOPT2: u16 = 0x07;
pub const RET: u16 = 0x08;
pub const MOVTRW: u16 = 0x0C;
pub const SAVE: u16 = 0x10;
pub const SPOPWD: u16 = 0x13;
pub const EXTOP: u16 = 0x14;
pub const SPOPWT: u16 = 0x17;
pub const RESTORE: u16 = 0x18;
pub const SWAPWI: u16 = 0x1C;
pub const SWAPHI: u16 = 0x1E;
pub const SWAPBI: u16 = 0x1F;
pub const POPW: u16 = 0x20;
pub const SPOPRS: u16 = 0x22;
pub const SPOPS2: u16 = 0x23;
pub const JMP: u16 = 0x24;
pub const CFLUSH: u16 = 0x27;
pub const TSTW: u16 = 0x28;
pub const TSTH: u16 = 0x2A;
pub const TSTB: u16 = 0x2B;
pub const CALL: u16 = 0x2C;
pub const BPT: u16 = 0x2E;
pub const WAIT: u16 = 0x2F;
pub const EMB: u16 = 0x30;
pub const SPOP: u16 = 0x32;
pub const SPOPWS: u16 = 0x33;
pub const JSB: u16 = 0x34;
pub const BSBH: u16 = 0x36;
pub const BSBB: u16 = 0x37;
pub const BITW: u16 = 0x38;
pub const BITH: u16 = 0x3A;
pub const BITB: u16 = 0x3B;
pub const CMPW: u16 = 0x3C;
pub const CMPH: u16 = 0x3E;
pub const CMPB: u16 = 0x3F;
pub const RGEQ: u16 = 0x40;
pub const BGEH: u16 = 0x42;
pub const BGEB: u16 = 0x43;
pub const RGTR: u16 = 0x44;
pub const BGH: u16 = 0x46;
pub const BGB: u16 = 0x47;
pub const RLSS: u16 = 0x48;
pub const BLH: u16 = 0x4A;
pub const BLB: u16 = 0x4B;
pub const RLEQ: u16 = 0x4C;
pub const BLEH: u16 = 0x4E;
pub const BLEB: u16 = 0x4F;
pub const RGEQU: u16 = 0x50;
pub const BGEUH: u16 = 0x52;
pub const BGEUB: u16 = 0x53;
pub const RGTRU: u16 = 0x54;
pub const BGUH: u16 = 0x56;
pub const BGUB: u16 = 0x57;
pub const BLSSU: u16 = 0x58;
pub const BLUH: u16 = 0x5A;
pub const BLUB: u16 = 0x5B;
pub const RLEQU: u16 = 0x5C;
pub const BLEUH: u16 = 0x5E;
pub const BLEUB: u16 = 0x5F;
pub const RVC: u16 = 0x60;
pub const BVCH: u16 = 0x62;
pub const BVCB: u16 = 0x63;
pub const RNEQU: u16 = 0x64;
pub const BNEH_D: u16 = 0x66;
pub const BNEB_D: u16 = 0x67;
pub const RVS: u16 = 0x68;
pub const BVSH: u16 = 0x6A;
pub const BVSB: u16 = 0x6B;
pub const REQLU: u16 = 0x6C;
pub const BEH_D: u16 = 0x6E;
pub const BEB_D: u16 = 0x6F;
pub const NOP: u16 = 0x70;
pub const NOP3: u16 = 0x72;
pub const NOP2: u16 = 0x73;
pub const BNEQ: u16 = 0x74;
pub const RNEQ: u16 = 0x74;
pub const BNEH: u16 = 0x76;
pub const BNEB: u16 = 0x77;
pub const RSB: u16 = 0x78;
pub const BRH: u16 = 0x7A;
pub const BRB: u16 = 0x7B;
pub const REQL: u16 = 0x7C;
pub const BEH: u16 = 0x7E;
pub const BEB: u16 = 0x7F;
pub const CLRW: u16 = 0x80;
pub const CLRH: u16 = 0x82;
pub const CLRB: u16 = 0x83;
pub const MOVW: u16 = 0x84;
pub const MOVH: u16 = 0x86;
pub const MOVB: u16 = 0x87;
pub const MCOMW: u16 = 0x88;
pub const MCOMH: u16 = 0x8A;
pub const MCOMB: u16 = 0x8B;
pub const MNEGW: u16 = 0x8C;
pub const MNEGH: u16 = 0x8E;
pub const MNEGB: u16 = 0x8F;
pub const INCW: u16 = 0x90;
pub const INCH: u16 = 0x92;
pub const INCB: u16 = 0x93;
pub const DECW: u16 = 0x94;
pub const DECH: u16 = 0x96;
pub const DECB: u16 = 0x97;
pub const ADDW2: u16 = 0x9C;
pub const ADDH2: u16 = 0x9E;
pub const ADDB2: u16 = 0x9F;
pub const PUSHW: u16 = 0xA0;
pub const MODW2: u16 = 0xA4;
pub const MODH2: u16 = 0xA6;
pub const MODB2: u16 = 0xA7;
pub const MULW2: u16 = 0xA8;
pub const MULH2: u16 = 0xAA;
pub const MULB2: u16 = 0xAB;
pub const DIVW2: u16 = 0xAC;
pub const DIVH2: u16 = 0xAE;
pub const DIVB2: u16 = 0xAF;
pub const ORW2: u16 = 0xB0;
pub const ORH2: u16 = 0xB2;
pub const ORB2: u16 = 0xB3;
pub const XORW2: u16 = 0xB4;
pub const XORH2: u16 = 0xB6;
pub const XORB2: u16 = 0xB7;
pub const ANDW2: u16 = 0xB8;
pub const ANDH2: u16 = 0xBA;
pub const ANDB2: u16 = 0xBB;
pub const SUBW2: u16 = 0xBC;
pub const SUBH2: u16 = 0xBE;
pub const SUBB2: u16 = 0xBF;
pub const ALSW3: u16 = 0xC0;
pub const ARSW3: u16 = 0xC4;
pub const ARSH3: u16 = 0xC6;
pub const ARSB3: u16 = 0xC7;
pub const INSFW: u16 = 0xC8;
pub const INSFH: u16 = 0xCA;
pub const INSFB: u16 = 0xCB;
pub const EXTFW: u16 = 0xCC;
pub const EXTFH: u16 = 0xCE;
pub const EXTFB: u16 = 0xCF;
pub const LLSW3: u16 = 0xD0;
pub const LLSH3: u16 = 0xD2;
pub const LLSB3: u16 = 0xD3;
pub const LRSW3: u16 = 0xD4;
pub const ROTW: u16 = 0xD8;
pub const ADDW3: u16 = 0xDC;
pub const ADDH3: u16 = 0xDE;
pub const ADDB3: u16 = 0xDF;
pub const PUSHAW: u16 = 0xE0;
pub const MODW3: u16 = 0xE4;
pub const MODH3: u16 = 0xE6;
pub const MODB3: u16 = 0xE7;
pub const MULW3: u16 = 0xE8;
pub const MULH3: u16 = 0xEA;
pub const MULB3: u16 = 0xEB;
pub const DIVW3: u16 = 0xEC;
pub const DIVH3: u16 = 0xEE;
pub const DIVB3: u16 = 0xEF;
pub const ORW3: u16 = 0xF0;
pub const ORH3: u16 = 0xF2;
pub const ORB3: u16 = 0xF3;
pub const XORW3: u16 = 0xF4;
pub const XORH3: u16 = 0xF6;
pub const XORB3: u16 = 0xF7;
pub const ANDW3: u16 = 0xF8;
pub const ANDH3: u16 = 0xFA;
pub const ANDB3: u16 = 0xFB;
pub const SUBW3: u16 = 0xFC;
pub const SUBH3: u16 = 0xFE;
pub const SUBB3: u16 = 0xFF;
//
// Multi-byte instructions
//
pub const MVERNO :u16 = 0x3009;
pub const ENBVJMP :u16 = 0x300D;
pub const DISVJMP :u16 = 0x3013;
pub const MOVBLW :u16 = 0x3019;
pub const STREND :u16 = 0x301F;
pub const INTACK :u16 = 0x302F;
pub const STRCPY :u16 = 0x3035;
pub const RETG :u16 = 0x3045;
pub const GATE :u16 = 0x3061;
pub const CALLPS :u16 = 0x30AC;
pub const RETPS :u16 = 0x30C8;
pub const MVERNO: u16 = 0x3009;
pub const ENBVJMP: u16 = 0x300D;
pub const DISVJMP: u16 = 0x3013;
pub const MOVBLW: u16 = 0x3019;
pub const STREND: u16 = 0x301F;
pub const INTACK: u16 = 0x302F;
pub const STRCPY: u16 = 0x3035;
pub const RETG: u16 = 0x3045;
pub const GATE: u16 = 0x3061;
pub const CALLPS: u16 = 0x30AC;
pub const RETPS: u16 = 0x30C8;

10
src/lib.rs
View File

@ -2,12 +2,12 @@
pub mod bus;
pub mod cpu;
pub mod err;
pub mod mem;
pub mod instr;
pub mod rom_lo;
pub mod rom_hi;
pub mod dmd;
pub mod err;
pub mod instr;
pub mod mem;
pub mod rom_hi;
pub mod rom_lo;
#[macro_use]
extern crate lazy_static;

12
src/mem.rs
View File

@ -1,11 +1,11 @@
use bus::*;
use err::BusError;
use std::fmt::Debug;
use std::fmt::Error;
use std::fmt::Formatter;
use std::ops::Index;
use std::vec::Vec;
use std::fmt::Debug;
use std::fmt::Formatter;
use std::fmt::Error;
pub struct Mem {
address_ranges: Vec<AddressRange>,
@ -70,7 +70,7 @@ impl Device for Mem {
} else {
Ok(
// Byte-swap
u16::from(self.ram[offset]).wrapping_shl(8) | u16::from(self.ram[offset + 1])
u16::from(self.ram[offset]).wrapping_shl(8) | u16::from(self.ram[offset + 1]),
)
}
}
@ -86,7 +86,7 @@ impl Device for Mem {
u32::from(self.ram[offset]).wrapping_shl(24)
| u32::from(self.ram[offset + 1]).wrapping_shl(16)
| u32::from(self.ram[offset + 2]).wrapping_shl(8)
| u32::from(self.ram[offset + 3])
| u32::from(self.ram[offset + 3]),
)
}
}
@ -168,7 +168,7 @@ impl Index<usize> for Mem {
#[cfg(test)]
mod tests {
use super::*;
#[test]
fn cannot_write_to_read_only_memory() {
let mut mem = Mem::new(0, 0x1000, true);

7215
src/rom_hi.rs
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7215
src/rom_lo.rs
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File diff suppressed because it is too large Load Diff